1. Field of the Invention
The present invention relates in general to a voltage regulator, and more particularly to an overcurrent protection circuit for a voltage regulator.
2. Description of the Related Art
FIG. 3 shows a configuration of a conventional overcurrent protection circuit for a voltage regulator. A reference voltage source 101 supplies a constant-voltage Vref to an inverted input terminal of an error amplifier 102. An output of the error amplifier 102 is connected to a gate of a PMOS output driver transistor 105, and is also connected to a gate of a first PMOS sense transistor 106, a gate of a second PMOS sense transistor 115, and a drain of a PMOS transistor 107 of an overcurrent protection circuit 103. A source of the PMOS output driver transistor 105 is connected to an input terminal IN and a drain of the same is connected to an output terminal OUT. A load resistor 114, a capacitor 113, and a voltage dividing circuit 104 consisting of resistors 111 and 112 are connected to the output terminal OUT. The voltage dividing circuit 104 supplies a divided voltage of an output voltage VOUT to a non-inverted input terminal of the error amplifier 102.
The overcurrent protection circuit 103 includes: the first and second PMOS sense transistors 106 and 115; the PMOS transistor 107; an NMOS transistor 108; resistors 109 and 110; first, second, and third PMOS level shifters 120, 119, and 118; and NMOS transistors 116 and 117 constituting a current mirror circuit. Here, the PMOS output driver transistor 105 has a gate width which is several times (e.g., 100,000 times) as large as that of the first PMOS sense transistor 106 for monitoring a load current Iout of the voltage regulator. Also, the PMOS output driver transistor 105 is designed so as to show a mirror relationship with the first and second PMOS sense transistors 106 and 115.
The conventional overcurrent protection circuit for a voltage regulator shown in FIG. 3 operates as follows.
If an amount of load current Iout supplied by the PMOS output driver transistor 105 to the load 114 is little, a current Isense flowing to the first PMOS sense transistor 106 is small in proportion to it. Thus, a voltage difference generated across the resistor 109 is also small and the NMOS transistor 108 is in a non-conductive state. Therefore, since a current does not flow to the NMOS transistor 108, a voltage difference is not generated across the resistor 110 and the PMOS transistor is also in a non-conductive state.
However, when a load current Iout supplied by the PMOS output driver transistor 105 to the load 114 increases, a current Isense flowing to the first PMOS sense transistor 106 also increases in proportion to it and a voltage generated across the resistor 109 also increases. Thus, the NMOS transistor 108 is in a conductive state. When the NMOS transistor 108 becomes conductive and a voltage difference generated across the resistor 110 increases, the PMOS transistor 107 conducts to increase a gate voltage of the PMOS output driver transistor 105. Thus, a driving ability of the PMOS output driver transistor 105 decreases and an output voltage OUT falls. In this way, elements are prevented from being destroyed by an overload current.
Moreover, operating states of the PMOS output driver transistor 105 and the first PMOS sense transistor 106 are usually made identical to each other based on an operation of a circuit including the second PMOS sense transistor 115, the first, second, and third PMOS level shifters 120, 119, and 118, and the NMOS transistors 116 and 117 constituting the current mirror circuit. In this case, a ratio between a value of a current caused to flow through the PMOS output driver transistor 105 and a value of a current caused to flow through the first PMOS sense transistor 106 is determined based on a transistor size ratio between the PMOS output driver transistor 105 and the first PMOS sense transistor 106. Thus, it is possible to set a load current Ipro permitting the overcurrent protecting function to be valid (refer to JP 2003-29856 A (pp. 1 to 6, and FIG. 1)).
However, the conventional overcurrent protection circuit for a voltage regulator involves a problem in that dispersion occurs in the load current Ipro permitting the overcurret protecting function to be valid due to manufacture dispersion. That is, a threshold voltage value Vth of the NMOS transistor 108 disperses. Moreover, the transistor size ratio between the PMOS output driver transistor 105 and the first PMOS sense transistor 106 also disperses due to the manufacture dispersion. Consequently, as shown in FIG. 4, the load current Ipro permitting the overcurrent protecting function to be valid greatly disperses from a target load current value Itype.